The Senior Emulation Engineer position is your opportunity to join one of the industry’s leading companies in platform security management and ransomware detection for cloud datacenters, 5G infrastructure and disaggregated compute ecosystems. We are looking for an emulation engineer to run and debug system-level workloads on Synopsys ZeBu emulation platforms and to own the integration and bring-up of transactors (XTORs) that connect the emulated SoC to real and virtual interfaces. Your focus is what happens once the design is running: getting the interfaces alive, executing firmware, OS, and use-case validation, triaging failures, and finding issues before silicon. This role is critical for validating the interoperability of our design with commercial AI servers, and for bridging the gap between hardware and software, as well as supporting SW development.   Key Responsibilities : Runtime validation Execute and debug system-level tests, firmware, and software workloads on ZeBu emulation models Bring up and validate secure boot flows (ROM, bootloader, Linux/RTOS) and platform security features such as root of trust, attestation, and firmware update on the emulated SoC Develop and run use-case scenarios covering platform security management, ransomware detection workloads, and datacenter/5G traffic patterns Triage failures and isolate root cause across RTL, firmware, driver, testbench, XTOR, and emulation environment; produce clear, reproducible bug reports Use ZeBu runtime debug capabilities (waveform capture, triggers, memory/register access, checkpoint/restore, force/release) to debug efficiently at speed Run and manage long-running regressions and soak tests; track pass rates, failure trends, and run-to-run stability Perform power-aware and performance validation runs: activity capture, bandwidth/latency profiling, and use-case benchmarking XTOR integration and bring-up Integrate and configure ZeBu transactors and speed adapters (PCIe, CXL, Ethernet, NVMe, DDR/LPDDR, I2C/I3C/SMBus, SPI, UART, JTAG, etc.) at the testbench and runtime level Bring up XTOR-to-DUT links from first connectivity through link training, enumeration, and stable data traffic; resolve protocol-level and configuration issues Develop host-side software and drivers that control XTORs (C/C++, Python, SystemVerilog DPI, ZeBu API), including connections to real devices, virtual peripherals, or hybrid platforms Debug XTOR-related failures using protocol analyzers, waveforms, and logs; determine whether the issue lies in the DUT, the XTOR, clocking/speed-adapter configuration, or the host Tune XTOR configuration for throughput, latency, and emulation-frequency compatibility Maintain XTOR configuration, version control, and documentation across model releases Configure host servers, boot environments to interact with the emulated design Integrate, develop and debug transactors, bridges and protocol adapters as needed Debug and root-cause embedded HW, SW and test failures in emulation Collaborate with RTL, DV and SW teams to resolve system level bugs