We are looking for an experienced Quantum Engineer to drive the two-qubit gate performance of our tunable-coupler superconducting quantum processors.
Two-qubit gate fidelity is one of the most consequential challenges in quantum computing, and it sits at the center of our roadmap toward error correction. In this role, you will design, execute, and interpret the experiments that propel our near- and long-term gate performance at scale. You will identify the dominant sources of two-qubit gate error on our processors, isolate their physical origin, and eliminate them — through pulse engineering, calibration methodology, error suppression strategies, or feedback to design and fabrication. Your conclusions will directly inform device design, control strategy, and platform-level decisions.
This is a role with substantial autonomy and ownership. You will directly influence the technical direction for gate performance work through the rigorous design and execution of your test plans, measurement and improvement of relevant metrics and error budgeting, and shaping of research priorities. You will do this in a deeply collaborative environment spanning device design, fabrication, control systems, software, theory and R&D, turning proofs of concept into robust procedures that hold up across hundreds of qubit pairs.